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NXP Semiconductors /LPC43xx /SGPIO /CTRL_DISABLE

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Interpret as CTRL_DISABLE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CTRL_DIS0RESERVED

Description

Disables the slice POS counter

Fields

CTRL_DIS

Slice count disable. Bit n controls slice n, (0 = slice A, …, 15 = slice P). 0 = Enables COUNT and POS counters. The counters start counting when the CTRL_EN bit or bits are set in the CTRL_ENABLED register. 1 = Disables POS counter of slice n.
RESERVED

Reserved.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data